The programmable digital devices implement the logical function by designed internal logic array block while the traditional digital systems do it by designed printed circuit block. 传统的数字系统通过设计线路板实现系统性能,而可编程器件是通过设计芯片内部的互联逻辑来实现系统功能。
A digital pulse trigger based on CPLD ( Complex Programmable Logic Device) is developed with Verilog hardware describe language, and its principle, system scheme, task and function of each unit are described. 详细介绍了运用Verilog硬件描述语言开发基于复杂可编程逻辑器CPLD(ComplexProgrammableLogicDevice)的数字脉冲触发单元的原理、系统方案及各单元的任务和功能。
Specific Lecture of Complex Programmable Logic Device-Application of CPLD and Designing of Digital Logic Unit and System 复杂可编程逻辑器件CPLD专题讲座(Ⅴ)&CPLD的应用和实现数字逻辑单元及系统的设计
A digital phase-shifting frequency-dividing clock has been designed with CPLD ( Complex Programmable Logic Device) technique which modularizes hardware circuit and integrates different modules into one chip. 设计了一种数字移相分频钟,其中利用了先进的复杂可编程逻辑器件(CPLD-ComplexProgrammableLogicDevice)技术,将硬件电路模块化,把各功能模块集成在一个芯片中。
Several user programmable functions are actualized by designing the complex digital logic control circuits. These functions includes user defined windowing, controllable reading out sequence, selectable output ports and so on. 通过设计复杂的数字控制逻辑电路,实现了多种用户可配置功能,包括能够实现自定义窗口读取,可变读出顺序,可选端口输出等功能。
Through the research of data-acquiring technique, a suit of programmable telemetry signal acquisition and encoding system based on DSP ( Digital Signal Processing) and CPLD ( Complex Programmable Logic Device) is designed. 本论文通过对数据采集技术的研究,设计了一套基于DSP和CPLD技术的可编程遥测信号采集与编码系统。